multiplicative halos

Design and Implementation of the Asynchronous Sub-Word Parallel MAC Unit

異步子字并行乘累加單元的設計與實現(xiàn)

To judge the capability of DSP, one of the important indexes is magnitude of operating of MAC in the unit time.

衡量DSP(數(shù)字信號處理器)芯片性能的一個重要指標是單位時間內(nèi)能夠完成乘累加操作的數(shù)量。

MAC plays a very important role in DSP algorithms.

乘累加器在DSP算法中有著舉足輕重的地位。

Design of a LU Decomposition Accelerator Based on High-Precision Multiplying and Accumulating

基于高精度乘累加的LU分解加速器的設計

FPGA Design of Multiply-accumulate Module in Image Compression Algorithm Based on BP Neural Network

BP神經(jīng)網(wǎng)絡圖像壓縮算法乘累加單元的FPGA設計

Design and Implementation of the Asynchronous Sub-Word Parallel MAC Unit

異步子字并行乘累加單元的設計與實現(xiàn)

High Performance MAC Design in MCU;

在微控制器（MCU）中的高效乘法累加器的設計

Hopf bifurcaion of a multiplier-accelerator model with progressive income tax and parameter interval of limit cycle existence;

累進所得稅的乘數(shù)-加速模型的Hopf分支與極限環(huán)存在的參數(shù)區(qū)間

The term to be added are the multiplicand multiplied by each of the bits of the multiplier.

各相加項等于乘數(shù)的各位乘以被乘數(shù)。

Traveling by plane is exciting, but it can also be very tiring.

搭乘飛機旅行很刺激，但也可能很累人，

A Least Square Nonlinear Estimation of Cumulative Reserves Model

累計儲量模型的非線性最小二乘估計

Addition, Subtraction, Multiplication, Division, Involution and Factorial of High Effective Locations

高有效位數(shù)的加、減、乘、除、乘方和階乘運算法

Study on Multiplier and Multiplier-accelerate Number Model in FuXin;

阜新投資乘數(shù)及乘數(shù)—加速數(shù)模型研究

The Metabolite Cumulation Mathematics Model of Ride Comfort in the Air Bus Cabin

大型客機客艙乘坐舒適性的代謝累積模型

ADAT (Automatic Data Accumulator and Transfer)

自動數(shù)據(jù)累加器與傳輸

decimal adjust accumulator instruction (DAA)

十進制調(diào)整累加器指令

force equals mass times acceleration.

力等于質(zhì)量乘以加速度。

We embarked for Calais at midday.

我們中午乘船去加來.

weighted least square criterion

加權最小二乘方準則

Pilgrims travel to Mecca in specially chartered planes .

朝圣者們乘專機去麥加。

arithmetic verb

算術動詞-指加、減、乘、除等